Библиотека сайта rus-linux.net
The book is available and called simply "Understanding The Linux Virtual Memory Manager". There is a lot of additional material in the book that is not available here, including details on later 2.4 kernels, introductions to 2.6, a whole new chapter on the shared memory filesystem, coverage of TLB management, a lot more code commentary, countless other additions and clarifications and a CD with lots of cool stuff on it. This material (although now dated and lacking in comparison to the book) will remain available although I obviously encourge you to buy the book from your favourite book store :-) . As the book is under the Bruce Perens Open Book Series, it will be available 90 days after appearing on the book shelves which means it is not available right now. When it is available, it will be downloadable from http://www.phptr.com/perens so check there for more information.
To be fully clear, this webpage is not the actual book.
Next: 4.1 Describing the Page Up: understand-html Previous: 3.4 High Memory   Contents   Index
Linux layers the machine independent/dependent layer in an unusual manner
in comparison to other operating systems [#!cranor99!#]. Other operating
systems have objects which manage the underlying physical pages such as the
pmap object in BSD but Linux instead maintains the concept of
a three-level page table in the architecture independent code even if the
underlying architecture does not support it. While this is relatively easy
to understand, it also means that the distinction between different types
of pages is very blurry and page types are identified by their flags or what
lists they exist on rather than the objects they belong to.
Architectures that manage their MMU differently are expected to emulate the
three-level page tables. For example, on the x86 without PAE enabled, only
two page table levels are available. The Page Middle Directory (PMD)
is defined to be of size 1 and ``folds back'' directly onto the Page
Global Directory (PGD) which is optimised out at compile time. Unfortunately,
for architectures that do not manage their cache or Translation
Lookaside Buffer (TLB) automatically, hooks that are machine dependent have to
be explicitly left in the code for when the TLB and CPU caches need to be
altered and flushed even if they are null operations on some architectures
like the x86. Fortunately, the functions and how they have to be used are
very well documented in the
cachetlb.txt file in the kernel
documentation tree [#!miller00!#].
This chapter will begin by describing how the page table is arranged and what types are used to describe the three separate levels of the page table followed by how a virtual address is broken up into its component parts for navigating the table. Once covered, it will be discussed how the lowest level entry, the Page Table Entry (PTE) and what bits are used by the hardware. After that, the macros used for navigating a page table, setting and checking attributes will be discussed before talking about how the page table is populated and how pages are allocated and freed for the use with page tables. Finally, it will be discussed how the page tables are initialised during boot strapping.
- 4.1 Describing the Page Directory
- 4.2 Describing a Page Table Entry
- 4.3 Using Page Table Entries
- 4.4 Translating and Setting Page Table Entries
- 4.5 Allocating and Freeing Page Tables
- 4.6 Kernel Page Tables
- 4.7 Mapping addresses to
Next: 4.1 Describing the Page Up: understand-html Previous: 3.4 High Memory   Contents   Index Mel 2004-02-15
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